Engines

FPGA

temper is available as a bitstream for stand-alone implementation on a dedicated device or as a netlist for integration into a larger FPGA design.

The core includes an integrated high-speed memory controller interface.

It is typically integrated together with sinter into a single netlist or bitstream, providing a complete Noise Reduction engine capable of handling all noise sources.

 

 

 Core features

  • Motion-compensated noise reduction
  • Real-time video up to 1080/60p
  • Noise estimation
  • Compact core, low power
  • No frame delay
  • Interface to standard DDR/DDR2/DDR2 controller

 Supported FPGAs 

  • Cyclone III, IV  

  • Spartan 3,6